In this post I will hook-up the input of the Seven Segment Display logic to an up-counter that is clocked by KEY0. The output of the Seven Segment Display logic will drive the HEX0 segment on the DE2-70. This basic test will confirm the working of the Seven Segment Display logic constructed in the previous post. Note that as of this project onwards I will now use the full pin assignment imported into the project via the CSV file furnished by Terasic (import through Assignments–>Import Assignments…).
The top-level schematic for this test appears as shown below. This is basically a hook-up of logic blocks (in this case a counter and a seven segment driver) constructed in earlier posts.
The Quartus II project archive file is attached at the end of this post for download.
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