This project makes use of one of my earlier designs, the Quadrature Encoder in VHDL (but targeted to for the Altera Cyclone-II on the DE2-70 board). The basic idea behind this design is to control the Quadrature Encoder output rate based on user input via the CapSense inputs. As an overview, the top-level schematic is [...]

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This is a step-by-step guide on my first project on the Avnet Spartan-3A. This will be a very simple project concentrating on the tool flow as opposed to design. To keep things simple we will capture the top level design as a schematic. The design will consist of blinking LED1 (pin D14) at a given [...]

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In this post I will outline a couple of solutions for a quadrature encoder generator in VHDL. I wanted a Quadrature Encoder signal for test purposes without the need to hook-up a real encoder and decided that an FPGA is perfect for this, especially considering that generating two signals with a 90-degree phase shift is [...]

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In a couple of previous posts (Counter and Seven Segment Display Decoder) I had put together components designed earlier (a simple counter and a seven segment decoder) for the sake of testing out the components, in particular the seven segment decoder. In that test the top-level entity was constructed entirely in Quartus II via schematic [...]

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In this post I will hook-up the input of the Seven Segment Display logic to an up-counter that is clocked by KEY0. The output of the Seven Segment Display logic will drive the HEX0 segment on the DE2-70. This basic test will confirm the working of the Seven Segment Display logic constructed in the previous [...]

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Now that we have a handle on the basic design flow we need to start working with VHDL to get on to bigger projects. Again to get a handle on working with VHDL I decided that I will take our original first project and capture it entirely in VHDL. It may be prudent to look [...]

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I will not go into the details of how SignalTap II (.stp) files are created and added to a design as these steps are fully detailed in the online tutorial # OCDSW1165. Before we begin, however, we need to add a clock to our design as SignalTap needs a clock to use for capturing. If [...]

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We will now analyze our previous design using the simulator, but first it may be useful to look at the online tutorial on simulation # ODSW1120. The foundation series course (ODSW1110) is also very useful in laying the foundations used here.
Simulation can be done in two ways either from within Quartus II or through ModelSim [...]

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In the Embedded world your standard Embedded microprocessor/DSP has all the peripherals preset and connected to the computation logic, although this is changing these days (see Cypress for their PSoC Mixed Signal Arrays). Additionally, these peripherals can also asynchronously interrupt the microprocessor when they need servicing. All the appropriate connections and signaling to the peripheral [...]

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