This project makes use of one of my earlier designs, the Quadrature Encoder in VHDL (but targeted to for the Altera Cyclone-II on the DE2-70 board). The basic idea behind this design is to control the Quadrature Encoder output rate based on user input via the CapSense inputs. As an overview, the top-level schematic is [...]

If you enjoy our post, feel free to subscribes to our rss feeds

This is a step-by-step guide on my first project on the Avnet Spartan-3A. This will be a very simple project concentrating on the tool flow as opposed to design. To keep things simple we will capture the top level design as a schematic. The design will consist of blinking LED1 (pin D14) at a given [...]

If you enjoy our post, feel free to subscribes to our rss feeds

In this post I will outline a couple of solutions for a quadrature encoder generator in VHDL. I wanted a Quadrature Encoder signal for test purposes without the need to hook-up a real encoder and decided that an FPGA is perfect for this, especially considering that generating two signals with a 90-degree phase shift is [...]

If you enjoy our post, feel free to subscribes to our rss feeds

In a couple of previous posts (Counter and Seven Segment Display Decoder) I had put together components designed earlier (a simple counter and a seven segment decoder) for the sake of testing out the components, in particular the seven segment decoder. In that test the top-level entity was constructed entirely in Quartus II via schematic [...]

If you enjoy our post, feel free to subscribes to our rss feeds

In this post I will hook-up the input of the Seven Segment Display logic to an up-counter that is clocked by KEY0. The output of the Seven Segment Display logic will drive the HEX0 segment on the DE2-70. This basic test will confirm the working of the Seven Segment Display logic constructed in the previous [...]

If you enjoy our post, feel free to subscribes to our rss feeds

We need a basic user interface component to display current settings, such as the current frequency of a frequency generator, say. To this end I will use the seven segment display (SSD) present on the DE2-70. Here I present two designs. One is a straight up look-up table and the other uses a minimized logic [...]

If you enjoy our post, feel free to subscribes to our rss feeds

At this stage, before progressing any further, I want to stress that it is prudent to get some degree of familiarity with VHDL. At the very least one should understand the following

Data types
Operators and attributes
Concurrent and Sequential code
Signals and variables

The above order is more or less what is presented in the Pedroni book (Circuit Design [...]

If you enjoy our post, feel free to subscribes to our rss feeds

Now that we have a handle on the basic design flow we need to start working with VHDL to get on to bigger projects. Again to get a handle on working with VHDL I decided that I will take our original first project and capture it entirely in VHDL. It may be prudent to look [...]

If you enjoy our post, feel free to subscribes to our rss feeds